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Grado académico
- Doctorado en Ciencias en el área de Ciencias Computacionales
Líneas de investigación actuales
- Metodologías de diseño para hardware de alto desempeño
- Arquitecturas reconfigurablesRadio software
- Seguridad y Criptografía
- Radio software
- Reducción de histéresis
- Diseños electrónicos basados en FPGAs, microprocesadores, microcontroladores, PICs y PLDs
Últimas publicaciones
- Dr. Ignacio Algredo Badillo. “A SINGLE FORMULA AND ITS IMPLEMENTATION IN FPGA FOR ELLIPTIC CURVE POINT ADDITION USING AFFINE REPRESENTATION”, Revista; World Scientific Publishing Company, Vol. 19 No. 2 (2010) 425-433.
- Dr. Ignacio Algredo Badillo. “EFFICIENT HARDWARE ARCHITECTURE FOR THE AES-CCM PROTOCOL OF THE IEEE 802.11i STANDARD, Revista Computers and Electrical Engineering 36 (2010) 565-577.
- Dr. Ignacio Algredo Badillo.: “TOWARDS A RECONFIGURABLE PLATFORM TO IMPLEMENT SECURITY ARCHITECTURES OF GÍRELES COMMUNICATIONS STANDARDS BASE DON THE AES-CCM ALGORITHM”Logos Verlag Berlin GmbH. En: New Trends in Electrical Engineering, Automatic Control, Computing and Communication Sciences. Pp. 411-428. ISBN: 978-3-8325-2429-6.
- Miguel Morales-Sandoval, Claudia Feregrino-Uribe, René Cumplido, and Ignacio Algredo-Badillo, An Area/Performance Trade-off Analysis of a GF(2m) Multiplier Architecture for Elliptic Curve Cryptography, Computers and Electrical Engineering (CEE 2008), Elsevier, Vol. 35, Issue 1, January 2009, pp. 54-58, ISSN: 0045-7906, Amsterdam, The Netherlands.
- Ignacio Algredo-Badillo, Claudia Feregrino-Uribe, René Cumplido, and Miguel Morales-Sandoval, FPGA Implementation and Performance Evaluation of AES-CCM Cores for Wireless Networks, 2008 International Conference on ReConFigurable Computing and FPGAs (ReConFig’08), pp. 421-426, ISBN: 978-1-4244-3748-1, 3-5 December, 2008, Cancun, Mexico.
- Ignacio Algredo-Badillo, Claudia Feregrino-Uribe, René Cumplido, and Miguel Morales-Sandoval, FPGA Implementation Cost and Performance Evaluation of the IEEE 802.16e and IEEE 802.11i Security Architectures based on AES-CCM, 5th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE 2008), pp. 304-309, IEEE Computer Society, ISBN: 978-1-4244-2498-6, 12-14 November 2008, Mexico City, Mexico.
- Ignacio Algredo-Badillo, Claudia Feregrino-Uribe, René Cumplido, and Miguel Morales-Sandoval, Design and Implementation of a Non-Pipelined MD5 Hardware Architecture Using a New Functional Description, The Institute of Electronics, Information and Communication Engineers, IEICE Transactions on Information and Systems, Vol. E91-D, No. 10, pp. 2519-2523, Online ISSN: 1745-1361, Print ISSN: 0916-8532, 1 October, 2008, Tokyo, Japan.
- Miguel Morales-Sandoval, Claudia Feregrino-Uribe, René Cumplido and Ignacio Algredo-Badillo, A Run Time Reconfigurable Co-Processor for Elliptic Curve Scalar Multiplication, IEEE Proceedings of the Magnum Conference on Computing 2007, 16th International Conference on Computing, 4-9 November, 2007, Mexico City, Mexico.
- Ignacio Algredo-Badillo, Claudia Feregrino-Uribe, René Cumplido-Parra, Design and Implementation of an FPGA-Based 1.452-Gbps Non-pipelined AES Architecture, Lecture Notes in Computer Science, Vol. 3982, pp. 456-465, Springer-Verlag 2006, ISBN: 3-540-34075-0, ICCSA 2006, 8-11 May, 2006, Glasgow, Scotland, United Kingdom (UK).
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